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C8051F380/1/2/3/4/5/6/7/C
SFR Definition 11.6. PSW: Program Status Word
Bit
Name
Type
Reset
7
CY
R/W
0
6
AC
R/W
0
5
F0
R/W
0
4
0
RS[1:0]
R/W
3
0
2
OV
R/W
0
1
F1
R/W
0
0
PARITY
R
0
SFR Address = 0xD0; SFR Page = All Pages; Bit-Addressable
Bit Name Function
7
6
5
4:3
2
1
0
CY
AC
F0
RS[1:0]
OV
F1
PARITY
Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a bor-
row (subtraction). It is cleared to logic 0 by all other arithmetic operations.
Auxiliary Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a
borrow from (subtraction) the high order nibble. It is cleared to logic 0 by all other arith-
metic operations.
User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
Register Bank Select.
These bits select which register bank is used during register accesses.
00: Bank 0, Addresses 0x00-0x07
01: Bank 1, Addresses 0x08-0x0F
10: Bank 2, Addresses 0x10-0x17
11: Bank 3, Addresses 0x18-0x1F
Overflow Flag.
This bit is set to 1 under the following circumstances:
?? An
ADD, ADDC, or SUBB instruction causes a sign-change overflow.
?? A
MUL instruction results in an overflow (result is greater than 255).
?? A DIV instruction causes a divide-by-zero condition.
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all
other cases.
User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
Parity Flag.
This bit is set to logic 1 if the sum of the eight bits in the accumulator is odd and cleared
if the sum is even.
Rev. 1.4
87
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